Behavioral Modeling of Switched Capacitor Integrators Based on Symbolic Admittance Matrix

This paper proposes a symbolic node admittance matrix representation approach to the behavioral modeling of switched capacitor (SC) integrators. This new model provides a better representation of the node voltage evolutions without the need for a fixed time step in the system. The newly proposed mode provides a more reliable behavioral model of the degrading effects of settling errors and the effects of finite switch resistance. A model based on this approach was build and simulation results are presented. A comparative example of a multi-bit Σ∆ Modulator is shown, the signal to noise plus distortion ratio is the measurement of choice for model characterization.